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Use of the “Via-In-Pad” Method to Ensure the High-Density Layout of the Conductive Pattern when Designing Multilayer Switching Structures
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@article{IJASEIT10831, author = {Ivan E. Chernov and Nikita A. Kondakov and Konstantin D. Perederin and Andrey I. Vlasov and Vladimir P. Zhalnin and Vadim A. Shakhnov}, title = {Use of the “Via-In-Pad” Method to Ensure the High-Density Layout of the Conductive Pattern when Designing Multilayer Switching Structures}, journal = {International Journal on Advanced Science, Engineering and Information Technology}, volume = {10}, number = {3}, year = {2020}, pages = {1176--1183}, keywords = {printed circuit board; BGA; SMD; tracing; thermal expansion coefficient (TEC); metallization; conductive material.}, abstract = {The application features of the Via-in-Pad method when implementing a high-density conductive pattern of multilayer switching structures in electronics is considered herein. The composition method for vias and contact pads for the tracing ability improvement is proposed, and the assessment methodology for the effective area utilization for BGA components is presented. The experimental study of the pressure sensor housing was carried out, which showed that the application of this method made it possible to reduce the number of vias by 40% and place more contact pads per unit area, which frees up the gaps for BGA tracing, reduces the pattern density and microwave signal paths. The obtained results confirmed the possibility of reduction of the usable space by 25%, which makes it possible to arrange more pads per unit area, to free up the gaps for BGA tracing, to reduce the time for drilling the workpieces, to reduce the number of used drills, and also provides the best heat removal from the components. The disadvantage is the large internal resistance of the transitions created by the Via-in-Pad method, in contrast to the standard ones, which can negatively affect the flow of critical signals. By comparing the resistances from the metallization layer of the via in the MPCB with a flexible flat cable and in the MPCB designed using the Via-in-Pad method, it was found that the Via-in-Pad method made it possible to increase the layout efficiency of multilayer printed circuit boards.}, issn = {2088-5334}, publisher = {INSIGHT - Indonesian Society for Knowledge and Human Development}, url = {http://ijaseit.insightsociety.org/index.php?option=com_content&view=article&id=9&Itemid=1&article_id=10831}, doi = {10.18517/ijaseit.10.3.10831} }
EndNote
%A Chernov, Ivan E. %A Kondakov, Nikita A. %A Perederin, Konstantin D. %A Vlasov, Andrey I. %A Zhalnin, Vladimir P. %A Shakhnov, Vadim A. %D 2020 %T Use of the “Via-In-Pad” Method to Ensure the High-Density Layout of the Conductive Pattern when Designing Multilayer Switching Structures %B 2020 %9 printed circuit board; BGA; SMD; tracing; thermal expansion coefficient (TEC); metallization; conductive material. %! Use of the “Via-In-Pad” Method to Ensure the High-Density Layout of the Conductive Pattern when Designing Multilayer Switching Structures %K printed circuit board; BGA; SMD; tracing; thermal expansion coefficient (TEC); metallization; conductive material. %X The application features of the Via-in-Pad method when implementing a high-density conductive pattern of multilayer switching structures in electronics is considered herein. The composition method for vias and contact pads for the tracing ability improvement is proposed, and the assessment methodology for the effective area utilization for BGA components is presented. The experimental study of the pressure sensor housing was carried out, which showed that the application of this method made it possible to reduce the number of vias by 40% and place more contact pads per unit area, which frees up the gaps for BGA tracing, reduces the pattern density and microwave signal paths. The obtained results confirmed the possibility of reduction of the usable space by 25%, which makes it possible to arrange more pads per unit area, to free up the gaps for BGA tracing, to reduce the time for drilling the workpieces, to reduce the number of used drills, and also provides the best heat removal from the components. The disadvantage is the large internal resistance of the transitions created by the Via-in-Pad method, in contrast to the standard ones, which can negatively affect the flow of critical signals. By comparing the resistances from the metallization layer of the via in the MPCB with a flexible flat cable and in the MPCB designed using the Via-in-Pad method, it was found that the Via-in-Pad method made it possible to increase the layout efficiency of multilayer printed circuit boards. %U http://ijaseit.insightsociety.org/index.php?option=com_content&view=article&id=9&Itemid=1&article_id=10831 %R doi:10.18517/ijaseit.10.3.10831 %J International Journal on Advanced Science, Engineering and Information Technology %V 10 %N 3 %@ 2088-5334
IEEE
Ivan E. Chernov,Nikita A. Kondakov,Konstantin D. Perederin,Andrey I. Vlasov,Vladimir P. Zhalnin and Vadim A. Shakhnov,"Use of the “Via-In-Pad” Method to Ensure the High-Density Layout of the Conductive Pattern when Designing Multilayer Switching Structures," International Journal on Advanced Science, Engineering and Information Technology, vol. 10, no. 3, pp. 1176-1183, 2020. [Online]. Available: http://dx.doi.org/10.18517/ijaseit.10.3.10831.
RefMan/ProCite (RIS)
TY - JOUR AU - Chernov, Ivan E. AU - Kondakov, Nikita A. AU - Perederin, Konstantin D. AU - Vlasov, Andrey I. AU - Zhalnin, Vladimir P. AU - Shakhnov, Vadim A. PY - 2020 TI - Use of the “Via-In-Pad” Method to Ensure the High-Density Layout of the Conductive Pattern when Designing Multilayer Switching Structures JF - International Journal on Advanced Science, Engineering and Information Technology; Vol. 10 (2020) No. 3 Y2 - 2020 SP - 1176 EP - 1183 SN - 2088-5334 PB - INSIGHT - Indonesian Society for Knowledge and Human Development KW - printed circuit board; BGA; SMD; tracing; thermal expansion coefficient (TEC); metallization; conductive material. N2 - The application features of the Via-in-Pad method when implementing a high-density conductive pattern of multilayer switching structures in electronics is considered herein. The composition method for vias and contact pads for the tracing ability improvement is proposed, and the assessment methodology for the effective area utilization for BGA components is presented. The experimental study of the pressure sensor housing was carried out, which showed that the application of this method made it possible to reduce the number of vias by 40% and place more contact pads per unit area, which frees up the gaps for BGA tracing, reduces the pattern density and microwave signal paths. The obtained results confirmed the possibility of reduction of the usable space by 25%, which makes it possible to arrange more pads per unit area, to free up the gaps for BGA tracing, to reduce the time for drilling the workpieces, to reduce the number of used drills, and also provides the best heat removal from the components. The disadvantage is the large internal resistance of the transitions created by the Via-in-Pad method, in contrast to the standard ones, which can negatively affect the flow of critical signals. By comparing the resistances from the metallization layer of the via in the MPCB with a flexible flat cable and in the MPCB designed using the Via-in-Pad method, it was found that the Via-in-Pad method made it possible to increase the layout efficiency of multilayer printed circuit boards. UR - http://ijaseit.insightsociety.org/index.php?option=com_content&view=article&id=9&Itemid=1&article_id=10831 DO - 10.18517/ijaseit.10.3.10831
RefWorks
RT Journal Article ID 10831 A1 Chernov, Ivan E. A1 Kondakov, Nikita A. A1 Perederin, Konstantin D. A1 Vlasov, Andrey I. A1 Zhalnin, Vladimir P. A1 Shakhnov, Vadim A. T1 Use of the “Via-In-Pad” Method to Ensure the High-Density Layout of the Conductive Pattern when Designing Multilayer Switching Structures JF International Journal on Advanced Science, Engineering and Information Technology VO 10 IS 3 YR 2020 SP 1176 OP 1183 SN 2088-5334 PB INSIGHT - Indonesian Society for Knowledge and Human Development K1 printed circuit board; BGA; SMD; tracing; thermal expansion coefficient (TEC); metallization; conductive material. AB The application features of the Via-in-Pad method when implementing a high-density conductive pattern of multilayer switching structures in electronics is considered herein. The composition method for vias and contact pads for the tracing ability improvement is proposed, and the assessment methodology for the effective area utilization for BGA components is presented. The experimental study of the pressure sensor housing was carried out, which showed that the application of this method made it possible to reduce the number of vias by 40% and place more contact pads per unit area, which frees up the gaps for BGA tracing, reduces the pattern density and microwave signal paths. The obtained results confirmed the possibility of reduction of the usable space by 25%, which makes it possible to arrange more pads per unit area, to free up the gaps for BGA tracing, to reduce the time for drilling the workpieces, to reduce the number of used drills, and also provides the best heat removal from the components. The disadvantage is the large internal resistance of the transitions created by the Via-in-Pad method, in contrast to the standard ones, which can negatively affect the flow of critical signals. By comparing the resistances from the metallization layer of the via in the MPCB with a flexible flat cable and in the MPCB designed using the Via-in-Pad method, it was found that the Via-in-Pad method made it possible to increase the layout efficiency of multilayer printed circuit boards. LK http://ijaseit.insightsociety.org/index.php?option=com_content&view=article&id=9&Itemid=1&article_id=10831 DO - 10.18517/ijaseit.10.3.10831