A New Approach for Designing of Computer Architectures Using Multi-Value Logic

Alessandro Simonetta (1), Maria Cristina Paoletti (2), Maurizio Muratore (3)
(1) Department of Enterprise Engineering, University of Rome “Tor Vergata”, Via del Politecnico, 1, Rome, 00133, Italy
(2) Department of Enterprise Engineering, University of Rome “Tor Vergata”, Via del Politecnico, 1, Rome, 00133, Italy
(3) Department of Enterprise Engineering, University of Rome “Tor Vergata”, Via del Politecnico, 1, Rome, 00133, Italy
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How to cite (IJASEIT) :
Simonetta, Alessandro, et al. “A New Approach for Designing of Computer Architectures Using Multi-Value Logic”. International Journal on Advanced Science, Engineering and Information Technology, vol. 11, no. 4, Aug. 2021, pp. 1440-6, doi:10.18517/ijaseit.11.4.15778.
In the last decade, we have seen how Moore's law has lost its validity because it has reached the physical limit of miniaturization of components and the problem of thermal dissipation increasing with the chip’s clock frequency. For this reason, multi-core architectures were born, and quantum computing is being looked at as a possible solution for more computing power. The aim of this article is to demonstrate the possibility to realize computer architectures using multi-value logic. The objective is reached when we are able to translate any MVL function into the corresponding MVL circuit. The method proposed is completely independent of the basis adopted in the MVL domain and the physical quantity used to represent or transfer the domain values. Thus, this approach provides a new theoretical and practical context for applying new technologies or polymorphic materials, which can represent multiple values. In order to give concreteness to the analyzed theoretical aspects, we will represent a case study based on a classical combinational circuit, the summing circuit using LTspice® XVII (© Analog Device Corporation) as simulation environment has been carried out. The results show that it is possible to build MVL combinatorial circuits, although there are limitations because the proposed solution is just a proof of concept. The method can also be successfully applied to sequential MVL circuits, which are not the subject of the present article.

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