International Journal on Advanced Science, Engineering and Information Technology, Vol. 1 (2011) No. 4, pages: 453-457, Proceeding of the International Conference on Advanced Science, Engineering and Information Technology (ICASEIT 2011), Bangi, Malaysia, 14-15 January 2011, DOI:10.18517/ijaseit.1.4.92

Fundamental Approach in Digital Circuit Design for 1-MHz Frequency PWM Gate Drive Application

Abstract

This paper discusses the design of a digital programmable logic circuit to produce a 5 V - output square wave pulses for four high power MOSFET switches using a fixed PWM circuit. It will be applied to drive the synchronous rectifier buck converter(SRBC) circuit. The PWM signals with multiple fixed time delay of 15 ns, 232 ns, 284 ns and 955 ns are generated. The steps taken to analyze each propagation time delay of each logic gate used and its combination are carefully studied. A multiplexer is added at the output of the logic circuit to select and produce the desired output pulses of 20% duty ratio. The logic outputs are compared with the analog pulses and results match each other within 1% in difference.

Keywords:

Duty Ratio; Fixed Time Delay; MOSFET; PWM

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